Is 1000 TOPS of Autonomous Driving Chip Power Really Necessary? Overkill or Underpowered?
Author: Alex Wang | Last updated: April 24, 2026|Reading time:~12 minutes
At Auto China 2026 in Beijing, 1000 TOPS has essentially become a must-have for luxury vehicles. The Li Auto L9, powered by two self-developed Mach 100 chips, reaches 2560 TOPS. The XPeng P7 Ultra combines three Turing AI chips to deliver 2250 TOPS of effective computing power. NIO’s ET9 uses two Shenji NX9031 chips to achieve a total of over 2000 TOPS.
If you are shopping for a smart EV, it is hard not to be impressed by these numbers. After all, salespeople will tell you: the higher the TOPS, the smarter the car. But does that logic really hold up?
An industry analysis released by S&P Global Mobility on June 26, 2025, pointed out that TOPS measures a type of parallel processing throughput designed for AI-intensive workloads. It does not, however, fully reflect a system’s overall computing capability. kDMIPS, by contrast, quantifies general-purpose processing performance. You need both to get the complete picture.
aiMotive, a leading supplier of automotive NPU IP, is even more direct. In a technical article published on its official website on June 15, 2021, the company wrote: “TOPS is misleading – it is a very poor indicator of how an NPU will perform on real automotive inference workloads.”
A compelling counterexample comes from actual products. Fixstars, an autonomous driving technology company, published a technical blog on December 2, 2025, explaining that the real bottleneck in a real time ADAS perception system is often not computing units, but memory bandwidth and data movement efficiency.
Industry data shows that effective on vehicle computing power often reaches only 20% to 40% of the theoretical peak. A chip rated at 254 TOPS might deliver just 50 to 100 TOPS during real world operation.
1. What Exactly Is a TOPS? Don’t Let the Number Fool You
1.1 Definition and Calculation
TOPS stands for Tera Operations Per Second – one trillion operations per second. A chip rated at 100 TOPS can theoretically perform 100 trillion math operations every second.
According to aiMotive’s hardware engineering team, this figure is usually calculated by multiplying the total number of MAC (multiply accumulate) units inside the chip by the clock frequency. For example, an NPU with 1024 MACs running at 1GHz has a theoretical computing power of about 2 TOPS. Since over 98% of automotive neural network inference consists of convolution operations – which are essentially multiply accumulate operations – TOPS can, in theory, reflect inference speed.
However, chipmakers often use different calculation methods. Some quote INT8 performance, others quote INT4. An INT4 number can be double the INT8 figure, but real world model inference does not always benefit from lower precision. It is similar to automakers advertising peak horsepower. That number does not directly tell you how the engine feels in daily driving.
1.2 Computational Capacity ≠ Actual Performance: Three Key Points
Utilization rate. The rated TOPS represents an ideal theoretical peak. In actual use, factors like memory bandwidth and data movement efficiency mean the effective utilization rate is often far lower.
Fixstars explained the root cause in its December 2, 2025 technical blog: a modern autonomous vehicle is essentially a data center on wheels, equipped with numerous high-bandwidth sensors. A single Level 4 test vehicle can generate around 4TB of data per day. One lidar sensor can produce 1 to 5 million data points per second. When the AI accelerator is waiting for data or weights to load from main memory, it stalls – performing no useful computation. That is exactly why utilization is much lower than the peak rating.
Type of computing power. Autonomous driving involves different processing modules working together. The NPU handles AI inference (image recognition, path planning). The CPU takes care of logic control and decision making. The GPU manages graphics rendering and some parallel computing. A high NPU TOPS number alone does not tell you the full story of a smart-driving chip’s capability.
Power consumption and cooling. High computing power comes with high power draw, which directly affects an EV’s real-world range. Today’s typical smart-driving chip consumes around 30W. Next generation chips targeting Level 4/5 are expected to draw even more. A 2000-TOPS chip running at full load can eat up several kilometers of range in just minutes. This is why most high-TOPS chips run in low power mode most of the time – not because they are not needed, but because the power budget does not allow it.
1.3 Why Are Automakers So Keen on Promoting “Total TOPS”?
The marketing motivation is obvious. Most consumers lack deep understanding of chip architecture. Under these conditions, “bigger number equals more premium” is the easiest story to sell.
The June 2025 S&P Global Mobility report also observed that Chinese domestic automakers are particularly aggressive here. They not only pack in high-resolution screens and AI voice assistants, but also actively market the specific SoC (such as Qualcomm or NVIDIA) as a core selling point.
There is also an industry-level logic. Stacking multiple chips is common in engineering. For example, four NVIDIA Orin-X chips working together can reach 1016 TOPS. But this approach comes with higher communication latency, more complex software adaptation, and a bigger power budget. By contrast, a single high-TOPS chip has clear advantages in engineering efficiency and data consistency. That is the technical meaning behind NIO’s claim that one Shenji chip equals the power of four Orin-X.
2. Where Does 1000 TOPS Come From? The 2026 Chip Landscape
2.1 International Players
NVIDIA remains the dominant force in smart driving chips. Its DRIVE AGX Thor system on chip, built on the Blackwell architecture, delivers up to 1000 INT8 TOPS (2000 FP4 TFLOPS) of AI computing power. The system is deeply optimized for Transformer models, Vision Language Action (VLA) models, and generative AI workloads.
A Kodiak AI press release published on NASDAQ on March 16, 2026 confirmed that Thor has entered mass production. Kodiak plans to use the DRIVE Hyperion architecture – featuring two Thor chips – to accelerate the deployment and large scale operation of its driverless trucks. Kodiak CEO Don Burnette was quoted as saying that the key to deploying physical AI lies in using data center level AI compute and optimizing it to run at the edge.
NVIDIA’s official developer site further confirms that a single AGX Thor SoC delivers up to 1000 INT8 TOPS, comes with ARM Neoverse V3AE CPU cores, and supports ASIL D functional safety – the highest automotive safety integrity level under the ISO 26262 standard.
Qualcomm’s Snapdragon Ride platform covers a wider range of computing power. According to TechRadar’s on-site report from CES 2026, published on January 15, 2026, the Snapdragon Ride Flex platform merges cockpit and ADAS functions onto a single chip. It can scale from a basic setup with one camera and one radar all the way up to a high-end configuration with multiple cameras, multiple radars, lidar, and HD maps.
2.2 China’s Self-Developed Chips
2026 marks an explosive wave of in-house automotive chip development in China.
NIO Shenji NX9031 is the world’s first mass-produced 5nm automotive-grade smart-driving chip. It packs over 50 billion transistors, delivers over 1000 TOPS of total computing power, and matches the performance of four NVIDIA Orin X chips. An AutoCango report from July 2, 2025 confirmed the chip has been fully deployed across NIO’s ET9, ES6, EC6, ET5 and other models since last year.
Li Auto Mach 100 uses a 5nm process and delivers 1280 TOPS from a single chip. It employs a unique dataflow architecture to maximize effective computing power. Li Auto’s internal comparisons show that, when running a VLA large model, a single Mach 100 chip provides 3 times the effective computing power of an NVIDIA Thor U, while a dual chip setup delivers 5 to 6 times the effective computing power. The research paper for the Mach 100 has been accepted for the 2026 ISCA Industry Track – the first time an automaker has published a chip paper at this top computer architecture conference.
XPeng Turing AI Chip provides 750 TOPS from a single chip. According to an XPeng official newsroom release on January 9, 2026, the P7+ equipped with this chip made its European debut at the 2026 Brussels Motor Show, with AI computing power more than double that of the first-generation P7+. More strategically, CnEVPost reported on March 25, 2026 that CEO He Xiaopeng announced the 2026 Mona M03 – XPeng’s most affordable model – will be the first car to feature the Turing AI chip, bringing 750 TOPS into the sub-$20,000 EV market.
Black Sesame Huashan A2000 family includes four products, with single chip computing power ranging from 200 to 1000 TOPS. A Gasgoo AutoNews report from April 15, 2026 cited company VP Shan Jizhang confirming the flagship A2000X platform delivers 1000 TOPS of equivalent computing power, designed specifically for Level 3 autonomous driving and robotaxi scenarios.
Horizon Robotics Journey 6P delivers 560 TOPS from a single chip. A Gasgoo AutoNews report from October 27, 2025 quoted Horizon Robotics stating the Journey 6 series is a scalable computing platform covering 18 to 560 TOPS. The chip, based on the third generation BPU Nash architecture, is optimized for real time Transformer model inference.
2.3 A Key Distinction: Single-Chip vs. System Total TOPS
System total TOPS is simply the sum of the rated TOPS of multiple chips. But there is a huge engineering gap between that number and the system’s real world usable computing power.
Stacking multiple chips introduces cross chip communication latency, data consistency challenges, compounding power consumption, and vastly increased software complexity. Four 250 TOPS chips working together typically deliver far less useful computing power than a single 1000 TOPS chip, because inter chip coordination eats up significant computing resources and time.
This is exactly the core logic behind NIO’s emphasis on “one Shenji equals four Orin X.” A single chip solution delivers efficiency gains through lower latency, higher system utilization, and better energy performance.
3. Computing Power Needs: How Many TOPS Do You Actually Require?
3.1 Computing Power Thresholds for Different Automation Levels
There is an order-of-magnitude difference in the computing power needed for different levels of driving automation. SAE International’s J3016 standard defines six levels from L0 to L5, serving as the global reference for development, testing, and regulation.
The June 2025 S&P Global Mobility report provided a striking data point: the average car in 2025 had about 19 TOPS of computing power – roughly the same as an iPhone 15. The firm estimates that average TOPS per vehicle will grow 4.8 times between 2024 and 2030.
It is worth noting that computing power requirements are not absolute. Fixstars made this clear in its December 2025 technical blog: in developing L2+ and L3 ADAS systems, the core engineering challenge is not chasing maximum theoretical TOPS. It is ensuring that the entire sense-act loop – from sensor input to vehicle response – completes within the safety critical time budget. Latency directly affects safety.
3.2 End-to-End Large Models: The Hidden Driver of Computing Demand
In 2025 and 2026, end-to-end Vision-Language-Action (VLA) models became mainstream for high-level smart driving. The Global Automotive VLA Models Market Research Report 2026, published by QYResearch, valued the market at approximately $601 million in 2025 and projected it to reach $2.362 billion by 2032, with a compound annual growth rate of 21.6%.
Compared to traditional modular approaches where perception, planning and control are separate, end-to-end models need much more computing power to perform complete inference from raw sensor input to vehicle control commands.
Urban NOA already demands 4 to 5 times the computing power of highway NOA. Layer real-time VLA model inference on top of that, and the need for chip computing capability grows exponentially. This is one of the fundamental drivers behind the high-TOPS chip race among automakers in 2026.
3.3 The Reality of Utilization Rates
Industry data shows that real-world effective computing power on vehicles often reaches only 20% to 40% of the peak rating. In daily driving scenarios – highway cruising, freeway following – the vast majority of a chip’s computing resources sit idle.
Fixstars pointed out in its December 2025 blog that the root of this waste lies in the fact that AI inference workloads are fundamentally “memory-bound.” The performance bottleneck is not computation speed, but data transfer speed. NVIDIA’s NVLink-C2C high-speed interconnect technology, with 180 GB/s of aggregate bidirectional bandwidth, was designed precisely to address the data movement bottleneck in multi-chip systems.
When algorithm optimization lags behind hardware pre-installation, the computing headroom that buyers pay a premium for ends up idling most of the time.
4. Overkill or Underpowered? It Depends on the User
4.1 For Regular Commuters: 200–500 TOPS Is Enough
If you drive a fixed route daily, mostly on highways, with limited urban congestion, 200 to 500 TOPS is sufficient to handle software updates for the next 3 to 5 years. Even if urban NOA functions arrive later, current mainstream solutions in this tier can run them well without needing over a thousand TOPS. Paying an extra premium for a chip that will mostly sit idle does not offer good value for these users.
4.2 For Tech Early Adopters: 1000 TOPS as “Future Insurance”
If you plan to keep the vehicle for more than 5 years and are excited about Level 3 functionality, reserving 1000 TOPS of computing headroom makes sense. But there is a condition: the automaker must have a clear L3 upgrade roadmap with a timeline, not just a vague promise that “the hardware is ready.”
It is worth noting that NVIDIA Thor was designed from the start to meet ASIL D functional safety. That kind of hardware level safety certification is an essential foundation for L3 and above.
4.3 For Frequent Long Distance and Complex-Road Users: Computing Power Equals Safety
If you often drive in mountainous areas, frequent rain or snow, or complex urban environments, the value of high computing power is easier to see. Stronger real time inference means faster response to sudden events, more decision making redundancy, and better generalization capability. In edge cases, these directly impact safety. For these users, the premium for high TOPS is more justified.
4.4 Other Factors That Matter Just as Much
Sensor configuration – the number and quality of cameras, lidar accuracy – algorithm maturity, the automaker’s OTA capability, and functional safety certification all have a direct impact on real world smart driving experience.
The S&P Global Mobility report from June 2025 emphasized that the surge in automotive computing power does not happen in isolation. It is driven simultaneously by cockpit innovation, expanding autonomous driving features, and the shift to software defined vehicles. When buying a car, you should weigh all these factors together rather than fixating on a TOPS number.
5. Practical Buying Advice for 2026: Don’t Be Held Hostage by the Numbers
5.1 Look at Effective Computing Power, Not Just the TOPS Rating
Ask the salesperson a few key questions: What is the NPU computing power specifically? Is it quoted as dense or sparse computing power? Has this chip been validated in a mass production vehicle? Also check whether any third party has published real world measurements on this chip solution.
aiMotive recommended in its June 2021 technical article evaluating “efficiency” rather than “utilization.” What truly matters is the actual inference frame rate achieved per watt of energy consumed – not the TOPS number on a spec sheet.
5.2 Prefer a Single High-TOPS Chip Over Multiple Stacked Chips
If your budget allows, choose a model with a single high-TOPS chip like NIO’s Shenji or Li Auto’s Mach 100, rather than a configuration that stacks several lower-TOPS chips. Compared to multi-chip solutions that must overcome cross chip communication and coordination overhead, a single-chip design has clear advantages in latency control, data consistency, and software complexity.
5.3 Pay Attention to the Software Ecosystem
NVIDIA’s CUDA ecosystem is very mature. Its DRIVE SDK, detailed on the official developer site, offers a complete set of developer tools including DriveWorks, NvMedia and TensorRT. Ecosystem maturity directly affects the speed of algorithm iteration and the quality of feature implementation. A mature ecosystem means faster OTA updates and broader scenario coverage.
5.4 Price-Segment Reference Guide
6. Looking Ahead
Level 4 autonomous driving is expected to need 2000 to 4000 TOPS of computing power. NVIDIA has already demonstrated that two Thor chips interconnected can reach 4000 FP4 TFLOPS.
According to market research by Yole Intelligence, published via the Edge AI and Vision Alliance in October 2023, the automotive semiconductor market will grow from $43 billion in 2022 to $84.3 billion by 2028, with an 11.9% CAGR. ADAS and electrification are the two core drivers.
However, algorithm optimization may well lower the hardware dependency. The industry trend is gradually shifting from “stacking TOPS” to a balanced development of “computing power + algorithms + data.”
As the S&P Global Mobility report from June 2025 concluded, automotive computing power has become a core defining metric of vehicle capability. It determines what a vehicle can do, and for how long it can remain competitive over its lifetime. What truly matters is not the TOPS number printed on a chip, but whether it can make every decision safely, reliably, and efficiently under real-world road conditions.
FAQ
Q: Is a 1000-TOPS chip always better than a 500-TOPS one?
A: Not necessarily. Real-world performance depends on effective utilization and algorithm optimization. As Fixstars pointed out in its December 2025 technical blog, in real-time ADAS scenarios the true bottleneck is often memory bandwidth, not raw computing power. Even AI accelerators rated at over 80 TOPS frequently operate well below peak performance in actual inference workloads because they are memory constrained.
Q: My car only has 100 TOPS now. Can it be upgraded to Level 3 via OTA later?
A: Almost certainly no. Level 3 requires hardware-level redundancy – including redundant braking, redundant steering, and a high TOPS chip certified to ASIL-D. The NVIDIA DRIVE AGX Thor was designed to exactly such standards. Software updates alone cannot compensate for missing physical hardware.
Q: How big is the gap between Chinese-developed chips and NVIDIA’s?
A: On the hardware side, NIO’s Shenji and Li Auto’s Mach 100 have matched NVIDIA Thor in single chip computing power and process technology. Li Auto’s Mach 100 paper being accepted at ISCA 2026 shows that domestic chip architecture is gaining international academic recognition. However, in terms of software ecosystem maturity, NVIDIA still holds a lead thanks to years of CUDA development.
Q: How many TOPS offers the best value in 2026?
A: Referencing S&P Global Mobility’s June 2025 data, the average 2025 car had about 19 TOPS, and by 2030 the average is expected to grow nearly fivefold. If your budget is limited, 200 to 500 TOPS can meet high level smart driving needs for the next 3 to 5 years. If you plan to keep the car long-term and look forward to L3, it makes sense to prioritize a model with a single chip solution at the 1000-TOPS level.
References
[1] aiMotive. (2021, June 15). Efficiency, not Utilization or TOPS: why it matters. https://aimotive.com/w/efficiency-not-utilization-or-tops-why-it-matters
[2] Fixstars Corporation. (2025, December 2). Measuring What Actually Matters in Real-Time ADAS Perception. https://blog.us.fixstars.com/measuring-what-actually-matters-in-real-time-adas-perception
[3] S&P Global Mobility. (2025, June 26). Automotive computing: The new competitive advantage for OEMs. https://www.spglobal.com/automotive-insights/en/blogs/2025/06/automotive-computing-the-new-competitive-advantage-for-oems
[4] NVIDIA. (2025, September 3). Accelerate Autonomous Vehicle Development with the NVIDIA DRIVE AGX Thor Developer Kit. NVIDIA Technical Blog. https://developer.nvidia.com/blog/accelerate-autonomous-vehicle-development-with-nvidia-drive-agx-thor-developer-kit
[5] QYResearch. (2026). Global Automotive VLA Models Market Research Report 2026. QYResearch.
Disclaimer
The author has no commercial relationship with any chipmaker or automaker mentioned in this article. All technical specifications and market data are sourced from publicly available materials and are provided for reference only. This content does not constitute vehicle purchasing advice. Autonomous driving technology is developing rapidly. Please refer to official automaker announcements for specific vehicle configurations and functions. Driver assistance features do not replace attentive, manual driving. Always obey local traffic laws and remain fully engaged behind the wheel.
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